Objectives
A real time system has to accept important temporal constraints. A real time embedded system must be able to react to events with a limited time.
During this course, the measures of response time to interruptions are studied and tested in laboratories, such as for example the influence of dynamic memories, of cache memories, of option of compilation. Measurements of response time to the interruptions, task's commutations, primitives of synchronizations are carried out on an embarked system based on a FPGA.
During this course, the measures of response time to interruptions are studied and tested in laboratories, such as for example the influence of dynamic memories, of cache memories, of option of compilation. Measurements of response time to the interruptions, task's commutations, primitives of synchronizations are carried out on an embarked system based on a FPGA.
Content
The course includes the study of models of management of an embedded system by polling, interruptions and using a real time kernel and these primitives of tasks management and synchronizations.
Specialized programmable interfaces are carried out in VHDL to help with these measurements. A real time kernel is studied and used at the time of the laboratories. A system of acquisition is carried out and the gathered data transmitted by an embedded Web server. To ensure the real time acquisition and reading by the Web server, a multiprocessor system is developed and carried out on FPGA. Cross development tools are used. New technology implementing hard multi-processors and FPGA on the same chip will be study and used (SOC-FPGA).
Each topic is treated by a theoretical course and an associated laboratory. The laboratories are realized on FPGA boards DE0-nano and DE1-SOC. A real time operating system is studied and used with the laboratories.
Specialized programmable interfaces are carried out in VHDL to help with these measurements. A real time kernel is studied and used at the time of the laboratories. A system of acquisition is carried out and the gathered data transmitted by an embedded Web server. To ensure the real time acquisition and reading by the Web server, a multiprocessor system is developed and carried out on FPGA. Cross development tools are used. New technology implementing hard multi-processors and FPGA on the same chip will be study and used (SOC-FPGA).
Each topic is treated by a theoretical course and an associated laboratory. The laboratories are realized on FPGA boards DE0-nano and DE1-SOC. A real time operating system is studied and used with the laboratories.
Links
- Professor: René Beuchat
- Teacher: Andrea Guerrieri
- Teacher: Sahand Kashani-Akhavan
- Teacher: Jonathan Scanzi
