Hello,
I am currently working on measuring the latency using C-code. I followed the guide on Moodle to modify "alt_irq_handler.c". I am able to see the pins being set and cleared using the Logic Analyzer.
However, I feel like I obtain really high latencies (45 cycles with both caches, 220 cycles with no cache) compared to the results I am supposed to get (70 cycles was the obtained value in the guide).
I have tried to measure the latency using the Signal Tap Logic Analyzer and looking at the instruction address of the cpu and I obtain 13 cycles with no cache, which doesn't match at all the 220 cycles using C-code.
What am I doing wrong?
Best regards,
Amaury