Reset and exception handling on SDRAM

Reset and exception handling on SDRAM

by Cédric Oliver Portmann -
Number of replies: 1

Hi everyone

We realized that our measurements with and without the SDRAM didn't actually change (they did but only marginally). The problem lies within the handler.h file which apparantly has no influence on the times we measure. When changing the ALT_EXCEPTIONS_DEVICE and the other parameters to NEW_SDRAM_CONTROLLER_0, the output is exatly the same as with ONCHIP_MEMORY2_0. Where are these parameters defined anyways? We can't find them in system.h. Do we need to change other parameters in linker.h?

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In reply to Cédric Oliver Portmann

Re: Reset and exception handling on SDRAM

by Sahand Kashani-Akhavan -

Hi,

If you are getting similar measurements with the onchip memory and the sdram, you are not placing the reset and exception vectors in the place you think.

You can not edit the system.h file with the reset vector address and expect the CPU to magically jump to it when it receives an interrupt/exception. The reason is that the CPU needs to know what this address is at hardware compile time since it is a constant it stores internally and to which it jumps immediately once it sees an interrupt. Software has no way of setting such a value.

If you want to set what the reset/exception vector addresses are, you need to look in the "Vectors" tab of the Nios CPU in Qsys. Over there you can define what memory these two vectors correspond to. It's highly possible they are currently pointing to the memory you don't want to use.