[LAB3] : Access Shared Ressources

[LAB3] : Access Shared Ressources

by Jonathan Magnin -
Number of replies: 2

Hi,

I am having issues for accessing shared ressources in lab3.

I have two subsystems both with a CPU and they are instantiated in a top level qsys system with shared ressources and uses AVALON MM pipeline bridge to communicate with them.

My problem is that I each CPU can access the peripherals on its local bus, but not the shared peripherals even if the address map is consistant. Unfortunately, I can't manage to find proper documentation on the pipeline bridge, links do not work, even within the intel website.

So my question is : how do we use a AVALON MM pipeline bridge properly ?

NOTE : What I do is to write at the address of the bridge and offset it to reach the address of the shared peripheral.

Best,

Jonathan

In reply to Jonathan Magnin

Re: [LAB3] : Access Shared Ressources

by Sahand Kashani-Akhavan -

Can you post screenshots of each CPU's Qsys sub-systems, as well as the upper Qsys system which instantiates both sub-subsystems?

Offsetting is the address of the pipeline bridge by the target peripheral is indeed the correct way to go. If you give us the screenshots above and tell us what address you read/write to, we can tell if it's correct.

In reply to Sahand Kashani-Akhavan

Re: [LAB3] : Access Shared Ressources

by Jonathan Magnin -

The issue is solved and it was not a bridge problem.

The offset was correct and already taken into account in the global system.h file (generated using the global .sopcinfo file). The problem was due to the GPIO in inout mode. Once I switched it to output only, it worked.