Hello,
my teammate and I would have some questions regarding lab 3. Unfortunately, we were not able to find the specific forum on Moodle for that lab and hence we are writing on this one.
Firstly, we would like to know if there is a specific reason for the two different serial interfaces chosen for the two CPUs (one being UART and the other JTAG UART). In effect, we could not find an explanation in Altera's guide for multiprocessors systems, in which there is no explicit mention of this.
Secondly, in section 3.1, it is said that we should "access a parallel port connected to the LEDs and incrementing a counter every 50 ms". Then, in section 3.2 "On each processor create a new task to increment a counter with the parallel port". However, we are not sure how we could use an output parallel port to increment a counter.
Thirdly, we would like to know if our understanding of sections 3.1 and 3.2 is correct. Is section 3.1 meant to use the PIO exclusive to each processor, whereas section 3.2 is meant to use the shared bid PIO with the aid of the mutex, so to possibly measure in time the difference between these access mechanisms?
Then, in section 3.3, we are unsure if we should use the hardware mailbox to make one processor send a message to the other, or if we should somehow use a software mailbox. Our doubt arises from the fact that we are asked to "create a process with the RTOS to wait on a queue of messages to print", hence suggesting the use of a software mailbox.
Finally, we have some doubts about the different counters that should be employed throughout the lab. In particular, we were unable to understand if the "specific counter for performance evaluation" that should be assigned to every processor (section 3) is the same that we must use in section 3.4. If this is the case, shouldn't such a counter be shared rather than being exclusive to every processor?
Thank you in advance for your answers.
