Hello,
I'm trying to make my Lab3 working and I have a few questions :
- I don't understand the purpose of having two separate memories for each processor : one SRAM for each (now called on-chip I suppose) and one shared SDRAM, are we suppose to put the instructions in one memory and the data in another ? (16k is not enough at all for uOSII)
- I don't understand also why there is a PIO in each subsystem, isn't it enough to access the common one protected by the mutex ? In any case, as they must drive the same LEDs I don't see how I could wire it in the top level as I have 3 sources for each LED.
- I can't find the JTAG DEBUG module and I don't understand why we use on UART on cpu_0 and one JTAG_UART on cpu_1when just using two instances of JTAG_UART seems to be working fine
- For the counter every xx ms, are we expected to use a hardware timer with an interrupt or a software one with uOSII (as in this link https://micrium.atlassian.net/wiki/spaces/osiidoc/pages/163879/Timer+Management) ?
- I suppose in 3.1 we read the PIO value and increase it without using the mutex, in 3.2 we use the Mutex ?
- For the Mailbox I suppose there is one sender and one reader (with interrupt) but if it's the case I don't understand the use of a second mutex.
Thanks a lot for your help in advance,
Théo