elf download problem with sdram

elf download problem with sdram

by Kay Emanuel Lächler -
Number of replies: 4

Hi,


We managed to do all the measurements with the on-chip memory, but now we are stuck when trying to add the SDRAM.

My first question: When adding the SDRAM, should we remove the on-chip memory from the platform design or have the two at the same time?

Second question: I tried both variants (with and without the on-chip memory) and always ran into the same problem, that the elf download fails when trying to run the C code from eclipse. I don't get any errors neither in the hardware synthesis, nor in the C compilation. I also connected to the VPN, so that shouldn't be a problem.

My hypothesis is that something isn't correctly connected either in the platform design or in the vhdl component declaration since I did all of this pretty much from guesswork because I couldn't find any instruction on how to do it correctly.

I attached the platform design, the component declaration and the error I get in eclipse when clicking on 'run'.

I would be very glad if someone could look at it and verify that all the connections are correct or if I'm doing something wrong, thanks in advance!




In reply to Kay Emanuel Lächler

Re: elf download problem with sdram

by Sahand Kashani-Akhavan -

Hi,

You have not connected the pin called "DRAM_CLK" in your top-level design. You need to instantiate a PLL with a slight latency, then use this as the clock for the SDRAM controller. Then you should be able to download your ELF file correctly.

Sahand

In reply to Sahand Kashani-Akhavan

Re: elf download problem with sdram

by Kay Emanuel Lächler -

Ok so I instantiate a PLL with a delay of 250ps and export the output, so that I can connect it to DRAM_CLK? and do I also need to connect the output of the PLL to the SDRAM controller in the platform designer?

In reply to Kay Emanuel Lächler

Re: elf download problem with sdram

by Kay Emanuel Lächler -

Ok I think I got it. I connect the DRAM_CLK to CLOCK_50 and connect the output of the PLL to the SDRAM controller. At least now I can finally download the elf!

Thank you very much for the help!

In reply to Kay Emanuel Lächler

Re: elf download problem with sdram

by Sahand Kashani-Akhavan -

Technically, it's the phase-shifted clock which should be connected to DRAM_CLK as that pin goes to the physical DRAM and it takes time for the signal to reach the chip, yet be sort of aligned with the clock that the internal SDRAM controller is receiving.

But I guess that at 50 MHz, this is not really an issue and it worked anyway :)