[Lab 3] top_level

Re: [Lab 3] top_level

by Sahand Kashani-Akhavan -
Number of replies: 0

Hi,

We weren't expecting you to take the tutorial files as-is, but rather to re-create the system to learn how it work from the ground up.

For the top-level file, you'll have to just instantiate the qsys system you generate inside the same top-level VHDL files you used in your previous labs.