Hi everyone,
We are currently developing a hardware sound synthesizer, in which a NIOS II CPU reads music pieces definitions (encoded as a subset of MIDI, an array of 2 words per MIDI note). The music pieces are defined in software for ease of modification (I know I could generate a memory initialization file, but I really want it to be more flexible), thus they are declared as arrays in header files which are included in the main program. It works fine for small pieces of music.
However, it seems that NIOS II GCC always places static data at the beginning of the memory, before even functions, interrupt and exception vectors: indeed, if the piece has too many notes (about 2500 seems to be the upper limit), GCC generates the following error:
/home/vm/Documents/rtes/Lab4/src/sw/nios/fpga_sound_synthesizer_bsp/HAL/src/alt_instruction_exception_entry.c:95: warning:
Unable to reach (null) (at 0x0403075c) from the global pointer (at 0x04028160) because the offset (34300) is out of the allowed range, -32678 to 32767.
The line marked with the error is in the HAL source file alt_instruction_exception_entry.c, at the following line:
With alt_instruction_exception_handler defined as:
> if(alt_instruction_exception_handler) {
/*
* Call handler. Its return value indicates whether the exception-causing
* instruction should be re-issued. The code that called us,
* alt_eceptions_entry.S, will look at this value and adjust the ea
* register as necessary
*/
return alt_instruction_exception_handler(cause, exception_pc, badaddr);
}
/* Function pointer to exception callback routine */
alt_exception_result (*alt_instruction_exception_handler)
(alt_exception_cause, alt_u32, alt_u32) = 0x0;
We have tried moving the includes / variable declarations around, to no avail.
The more notes we add, the larger the reported offset, which seems to confirm our suspicions.
Thus, the question is: is it possible to force NIOS II GCC to place large include data towards the end of the memory, or at least make sure that essential code such as exception / interrupt vectors and ISRs lives at memory addresses that are reachable?
Thanks a lot,
Alex