[Fix] Interrupt IDs in BSP's system.h always set to -1

[Fix] Interrupt IDs in BSP's system.h always set to -1

by Alexandre Chau -
Number of replies: 4

Hi all,

You may run into this annoying issue where the system.h file of your BSP, which contains the macro definitions that describe your system (such as device addresses, interrupt IDs, etc.) will always assign -1 to the interrupt-related macros of your device, such as <device instance name>_IRQ and <device instance name>_IRQ_INTERRUPT_CONTROLLER_ID, even if you right-click on your BSP project in Eclipse > Nios II > Generate BSP.

Here's an example:

#define ALT_MODULE_CLASS_buttons_controller_0 buttons_controller
#define BUTTONS_CONTROLLER_0_BASE 0x8001000
#define BUTTONS_CONTROLLER_0_IRQ -1
#define BUTTONS_CONTROLLER_0_IRQ_INTERRUPT_CONTROLLER_ID -1
#define BUTTONS_CONTROLLER_0_NAME "/dev/buttons_controller_0"
#define BUTTONS_CONTROLLER_0_SPAN 16
#define BUTTONS_CONTROLLER_0_TYPE "buttons_controller"

Thus your interrupts are never handled, as they are registered to an empty ID.
To fix that issue, do not forget to set the associated addressable interface in the component editor for your peripheral in QSys / Platform designer to your Avalon slave interface:



Best,

The TAs team

In reply to Alexandre Chau

Re: [Fix] Interrupt IDs in BSP's system.h always set to -1

by Antoine Pierre Nicolas Schmider -

Hello,

So that means that our custom PIO needs to generate interrupts? From the Zoom discussion of 03/08 I thought it was not necessary.

If it is, do you have any recommandation on how to implement it in VHDL?

Thanks in advance.

Antoine Schmider

In reply to Antoine Pierre Nicolas Schmider

Re: [Fix] Interrupt IDs in BSP's system.h always set to -1

by Alexandre Chau -

Hi,

You can use any source of interrupts, as long as you can reliably measure the response, recovery and latency times from it with some timer and a logic analyzer.

If you wish to add the interrupt functionality to your own timer or PIO, you need to add an interrupt sender to your interface (incl. your architecture's ports) using a simple (std_logic) lane. You can bind it to a register in your component in VHDL by simply having it remember the interrupt level synchronously (for instance by generating a register with a signal, set it at 0 at reset, and at 1 when you want to interrupt the CPU). Your peripheral should hold the 1 level until the CPU clears it. To do so, you will need to implement a clearing mechanism (for instance an Avalon write from the CPU to a given control register of your peripheral) to reset the interrupt level once the CPU deemed it serviced. Then in the Qsys component editor, don't forget to add an interrupt sender interface, associate it with the Avalon slave as mentioned above, connect everything in the main Qsys window and use System > Assign interrupt numbers.

Cheers,

The TAs Team

In reply to Antoine Pierre Nicolas Schmider

Re: [Fix] Interrupt IDs in BSP's system.h always set to -1

by Filip Slezák -

Hi, 

How do we enable and generate interruptions from buttons? How to write the C code they will trigger (and any other steps we might have forgotten before that)?

F&J

In reply to Filip Slezák

Re: [Fix] Interrupt IDs in BSP's system.h always set to -1

by Alexandre Chau -

Hi,

You'll want to use the "alt_ic_isr_register" function from sys/alt_irq.h, with which you can register your own function from your code as a user-defined interrupt routine. Have a look at the documentation for specification and usage: https://www.intel.com/content/dam/altera-www/global/ja_JP/pdfs/literature/hb/nios2/n2sw_nii52006.pdf

Cheers,

The TAs team